Effect of ITO Serving as a Barrier Layer for Cu Electrodes on Performance of a-IGZO TFT

Abstract

In this letter, we propose a strategy to improve the electrical performance of amorphous In-Ga-Zn-O (a-IGZO) thin film transistor (TFT) with the copper (Cu) electrodes by depositing a 30-nm thick In-Sn-O (ITO) interlayer on top of IGZO layer to suppress Cu migration. As a result, the a-IGZO TFT with ITO interlayer exhibits enhanced electrical performance (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> of 1.5 V, μ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FE</sub> of 11.5 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs, SS of 0.2 V/dec, I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> of 2.4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> , and R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> W: 18 cm).