2017 · 12 citations · 34 references
ComputingComputer EngineeringComputer ScienceEmbedded SystemsHardware-software Co-designReal-time SystemsCpu SchedulingInterprocess CommunicationMixed-criticality SystemsReal-time Resource ManagementReal-time Systems ArchitectureResource-constrained SchedulingConstraintsHardware Isolation MechanismsHardware ResourcesIsolationMemory SpaceMulticore ArchitecturesMulticore SystemsReal-time Resource Allocation
When hosting real-time applications on multicore platforms, interference from shared hardware resources can significantly increase task execution times. Most proposed approaches for lessening interference rely on mechanisms for providing hardware isolation to tasks. However, one limitation of most prior work on such mechanisms is that only static task systems have been considered that never change at runtime. In reality, safety-critical applications often transition among different functional modes, each defined by a distinct set of running tasks. In a given mode, only tasks from that mode execute, yet tasks from all modes consume memory space, and this creates additional constraints affecting hardware-isolation techniques. This paper shows how to address such constraints in the context of an existing real-time resource-allocation framework called MC2 (<u>m</u>ixed-<u>c</u>riticality on <u>m</u>ulti<u>c</u>ore). In MC2, hardware-isolation techniques are employed in conjunction with criticality-aware task-provisioning assumptions that enable hardware resources to be utilized more efficiently.
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Techniques for Multiprocessor Global Schedulability Analysis
Sanjoy Baruah · 2007 · 695 citations
Bounding memory interference delay in COTS-based multi-core systems
Hyoseung Kim, Dionisio de Niz, Björn Andersson et al. · 2014 · 209 citations · Full text
Mixed-Criticality Real-Time Scheduling for Multicore Systems
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