A 2–22 GHz CMOS Distributed Power Amplifier With Combined Artificial Transmission Lines

Abstract

This letter presents a novel compact distributed power amplifier (DPA) implemented in a 0.18-μm CMOS technology. Two three-stage DAs are combined with their input artificial transmission lines (ATLs) shared to work as a preamplifier for broadband impedance matching and gain improvement, while two four-stage DAs are combined with their output ATLs shared to work as a medium-power amplifier for high output power in a wide frequency band. Measurement results show that the DPA provides 11.9-dB average associated gain from 1 to 23.8 GHz. The output power at 1-dB output compression point (OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1 dB</sub> ) is more than 8.9 dBm over the frequency of 2-22 GHz, and the peak power-added efficiency is 10% with the OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1 dB</sub> of 14.5 dBm.