A 28 Gb/s 1.6 pJ/b PAM-4 Transmitter Using Fractionally Spaced 3-Tap FFE and $G_{m}$ -Regulated Resistive-Feedback Driver

Abstract

We presents an energy-efficient PAM-4 transmitter that provides a controlled output impedance, scalable output voltage swing, and fractionally spaced feed-forward equalization (FFE). By using a resistive-feedback output driver, the proposed PAM-4 transmitter can reduce the power dissipation in the pre-driver stages compared with conventional transmitters. It also offers a more straightforward implementation of a 3-tap FFE owing to the simple current-summing structure of the pre-driver. In addition, the output impedance of the proposed output driver is controlled by regulating the Gm of the driver cell, which results in good signal integrity for high-speed operation without the use of peaking inductors. A prototype chip is fabricated in 28-nm CMOS technology and occupies an active area of 0.048 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . It achieves a data rate of 28 Gb/s, exhibiting the state-of-the-art energy efficiency of 1.59 pJ/b for the differential output swing of 207 mV.