Self-Regulated Reconfigurable Voltage/Current-Mode Inductive Power Management

Abstract

A reconfigurable power management structure for inductive power delivery has been proposed by adaptively employing either resonant voltage or current mode (VM or CM) to improve the inductive power transmission performance against coils' coupling distance (d), orientation (φ), and load impedance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> ) variations. At the presence of these variations, unlike conventional VM and CM power managements with poor voltageand power-conversion efficiencies (VCE and PCE), respectively, the proposed voltage/current-mode inductive power management (VCIPM) chip can achieve high VCE by automatically switching to CM when the receiver (Rx) coil voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</sub> ) is smaller than the required load voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> ), and achieve high PCE by operating in VM when V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</sub> > V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> . In addition, since VM and CM are only suitable for small and large R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> within the range of hundreds of ohms and above, respectively, the VCIPM chip can extend the RL range. The VCIPM chip also eliminates the need for two off-chip capacitors by performing rectification, regulation, and over-voltage protection (OVP) in one step with one off-chip capacitor. In VM, intentional reverse current is employed for both voltage regulation and OVP, while the Rx coil switching frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sw</sub> ) is adjusted for voltage regulation in CM. The theory behind the proposed VCIPM structure has been presented and validated by simulations and measurements. A VCIPM prototype chip was fabricated in a 0.35-μm 2P4M standard CMOS process occupying 0.52-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> active area. In measurements, the VCIPM chip, operating at 1 MHz, achieved a high VCE of 4.1 V/V for R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> of 100 kΩ by operating in CM with f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sw</sub> = 166.6 kHz, and extended d and φ from 6 to 13.5 cm (125%) and 30° to 75° (150%), respectively, compared to its VM counterpart by adaptively switching from VM to CM.