An experimental microarchitecture for a superconducting quantum processor

TLDR

Quantum computers promise to solve classically intractable problems such as factoring and quantum simulation, yet research has largely focused on either high‑level programming or low‑level hardware, leaving the use of compiler output for experimental processor control largely unexplored. The authors propose and construct a prototype flexible control microarchitecture that supports quantum‑classical mixed code for a superconducting quantum processor. The microarchitecture comprises a codeword‑based event control scheme, queue‑based precise timing, and a multilevel instruction decoder, and introduces quantum microinstructions that enable flexible, precisely timed control of quantum operations. The prototype was validated by performing a standard gate‑characterization experiment on a transmon qubit.

Abstract

Quantum computers promise to solve certain problems that are intractable for classical computers, such as factoring large numbers and simulating quantum systems. To date, research in quantum computer engineering has focused primarily at opposite ends of the required system stack: devising high-level programming languages and compilers to describe and optimize quantum algorithms, and building reliable low-level quantum hardware. Relatively little attention has been given to using the compiler output to fully control the operations on experimental quantum processors. Bridging this gap, we propose and build a prototype of a flexible control microarchitecture supporting quantum-classical mixed code for a superconducting quantum processor. The microarchitecture is based on three core elements: (i) a codeword-based event control scheme, (ii) queue-based precise event timing control, and (iii) a flexible multilevel instruction decoding mechanism for control. We design a set of quantum microinstructions that allows flexible control of quantum operations with precise timing. We demonstrate the microarchitecture and microinstruction set by performing a standard gate-characterization experiment on a transmon qubit.