Monolithically Integrated CMOS-SMR Oscillator in 65 nm CMOS Using Custom MPW Die-Level Fabrication Process

Abstract

Acoustic resonators, such as thin-film solidly mounted resonators (SMRs) and silicon microelectromechanical systems have been used widely in commercial and research RF communication circuits to implement high-Q oscillators and highly selective filters. Monolithic integration is a promising solution to address the growing demand for such components while continuing the aggressive miniaturization of radios. In this paper, we demonstrate successful monolithic SMR-CMOS co-integration by building a high-Q SMR atop a standard 65-nm CMOS substrate using a custom die-level fabrication process. The approach takes advantage of features in the back-end-of-line to deliver the surface smoothness required for fully supported mechanical resonators, which was not possible using traditional process approaches. This paper marks the first demonstration of SMR integration on 65-nm CMOS. The CMOS die used is more than 400% smaller in area than those in the previous die-level demonstrations of monolithically integrated piezoelectric resonators on CMOS.