Publication | Closed Access
An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors
11
Citations
12
References
2017
Year
Unknown Venue
EngineeringComputer ArchitectureMulti-channel Memory ArchitectureHardware SecurityHigh-performance ArchitectureSelective Compression ArchitectureZero-duplicate CompressionNetwork TrafficParallel ComputingManycore ProcessorLossless Compression3D Ic ArchitectureComputer EngineeringCachingComputer ScienceData CompressionMicroelectronicsMemory ArchitectureEdge ComputingCloud ComputingMany-core ArchitectureParallel Programming
In this paper, we propose a novel compression method called Zero-Duplicate Compression (ZDC) to compress network traffic and to increase lifetime in Non-Volatile Memories (NVMs) as a Last-Level-Cache (LLC). Moreover, we limit compression by a new mechanism called Selective Compression Architecture (SCA) to reduce delay overhead and static energy from compression/decompression. Our experiments show that the ZDC provides comparable compression ratio to two other state-of-the-art compression methods and the SCA improves energy consumption and performance by about 76% and 11%, on average, compared with the traditional architecture, respectively.
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