Publication | Closed Access
Investigation of an anomalous hump phenomenon in via-type amorphous In-Ga-Zn-O thin-film transistors under positive bias temperature stress
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Citations
25
References
2017
Year
Parasitic Tft PerformanceElectrical EngineeringEngineeringPhysicsNanoelectronicsElectronic EngineeringBias Temperature InstabilityApplied PhysicsCondensed Matter PhysicsGate InsulatorThreshold VoltageOxide ElectronicsSemiconductor MaterialMicroelectronicsAnomalous Hump PhenomenonSemiconductor Device
Amorphous InGaZnO thin film transistors (a-IGZO TFTs) with an etching-stop layer (ESL) exhibit an anomalous negative shift of threshold voltage (Vth) under positive bias temperature stress. TFTs with wider and shorter channels show a clear hump phenomenon, resulting from the existence of both main channels and parasitic channels. The electrons trapped in the gate insulator are responsible for the positive shift in the main channel characteristics. The electrons trapped near the IGZO edges and the holes injected into the ESL layer above InGaZnO (IGZO) jointly determine the shift of the parasitic TFT performance.
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