Journal of Instrumentation · 2017 · 18 citations · 2 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysHeterogeneous ComputingAccelerator ArchitectureAccelerator IntegrationField-programmable Gate Array ArchitectureFpga ArchitectureHeterogeneous System ArchitectureInterconnect ArchitectureDma Engine DesignGpu ArchitectureGpu IntegrationHeterogeneous Fpga ArchitecturesHigh-performance Computing SystemsOn-chip CommunicationProgrammable Dma EnginesTrigger Processing
Modern data acquisition and trigger systems require a throughput of several GB/s and latencies of the order of microseconds. To satisfy such requirements, a heterogeneous readout system based on FPGA readout cards and GPU-based computing nodes coupled by InfiniBand has been developed. The incoming data from the back-end electronics is delivered directly into the internal memory of GPUs through a dedicated peer-to-peer PCIe communication. High performance DMA engines have been developed for direct communication between FPGAs and GPUs using "DirectGMA (AMD)" and "GPUDirect (NVIDIA)" technologies. The proposed infrastructure is a candidate for future generations of event building clusters, high-level trigger filter farms and low-level trigger system. In this paper the heterogeneous FPGA-GPU architecture will be presented and its performance be discussed.
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A time-multiplexed track-trigger architecture for CMS
G. Hall, D. Newbol, M. Pesaresi et al. · Journal of Instrumentation · 2014 · 12 citations · Full text