2016 · 15 citations · 7 references
EngineeringComputer EngineeringElectrical EngineeringBiomedical Signal ProcessingLow-power DesignMicroelectronicsCmos Circuit DesignDigital Signal ProcessingDynamic Power ReductionLow-power Digital Circuit DesignPower OptimizationCmos Analog Integrated CircuitsCmos Logic CircuitsComparator DesignComparatorsDigital Signal Processing Block ArchitectureEnergy-efficient Digital CircuitsLow-power Cmos DesignLow-power Signal Processing
Absolute value comparators are becoming essential building blocks for new biomedical signal processing systems. Direct conversion of conventional comparators, which work on actual signal values, into absolute value comparators involve full wave rectifiers and this is suboptimal for a number of reasons. This paper presents a novel absolute value comparator circuit implemented without the use of full-wave rectifier blocks and with low complexity. The overall circuit consumes 113 nW from a 1V supply and is suitable for processing bio-signals in low power biomedical systems. The circuit has been fabricated in a 0.35 μm CMOS technology occupying an area of 0.07 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . A top-level implementation and analysis has also been presented. This would allow designers to perform comparisons between absolute values of input signals, by changing the circuit level implementations of each of the blocks to meet the system target specifications.
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A low-noise self-calibrating dynamic comparator for high-speed ADCs
Masaya Miyahara, Yusuke Asada, Daehwa Paik et al. · 2008 · 414 citations
Engineering, Computer Engineering, Electrical Engineering +17