Large scale integration and reliability consideration of triple gate transistors

Abstract

Large scale integration and reliability of triple gate FETs (TG-FETs) are investigated. The SRAM chip composed of TG-FETs demonstrated 20Mbits of working cells, and 45/spl deg/ rotated TG-FET is found to be superior from reliability perspective. Future TG-FET design is proposed, utilizing technologies including alternating phase shift mask lithography, local-interconnects and metal gate/undoped channel.