A new nano-electro-mechanical field effect transistor (NEMFET) design for low-power electronics

Abstract

An accumulation-mode design for nanometer-scale electromechanical-gate field effect transistors (NEMFETs) is proposed and studied via simulation. In the off state, the gate electrode is in contact with the thin gate dielectric and short-channel effects are effectively suppressed. In the on state, the gate electrode is separated from the thin gate dielectric so that the threshold voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> is dynamically lowered and the transistor drive current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> is enhanced, and gate leakage is eliminated. The NEMFET can likely meet performance specifications for low-power applications at 25 nm gate length, and is attractive for scaled supply voltage operation