Optimized complementary 40 V power LDMOS-FETs use existing fabrication steps in submicron CMOS technology

Abstract

This paper discusses development of state-of-the-art complementary isolated lateral 40 V rated power MOSFETs. The goals of this project were to provide BV specific devices for use with an existing merged VLSI technology. Devices meeting this goal were fabricated in a production manufacturing environment with no extra cost added to the process. The p-channel FET has a BV=60 V, and R/sub s/p=2.71 m/spl Omega/ cm/sup 2/ @V/sub gs/=15 V, and for the n-channel FET, BV=47 V and R/sub sp/=0.67 m/spl Omega/cm/sup 2/ @V/sub gs/=15 V. These devices are seen to be very competitive solutions with advanced integral on-chip intelligence.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>