2002 · 19 citations · 0 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignBipolar Junction TransistorsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyIntegrated Circuit DesignIntegrated Circuit FabricationMetal-oxide-semiconductor Field-effect TransistorsBicmos TechnologyCmos Fabrication ProcessesCmos Logic CircuitsDevice OptimizationMetallizationPedestal FormationSchottky Barrier ContactsSchottky Barrier Diodes
A modular process architecture has been adopted to develop a versatile yet manufacturable, single-poly, four-level metal, fully complementary BiCMOS technology for sub-0.5 mu m logic and microprocessor products. Both the poly-emitter vertical n-p-n and p-n-p bipolar transistors are integrated into a dual-poly (n/sup +//p/sup +/) gate CMOS process flow. Using a pedestal implant in the emitter window, the n-p-n performance has been enhanced to 26 GHz. Lateral p-n-p and TiSi/sub 2/ Schottky barrier diode devices formed during the titanium self-aligned silicide process are available for various circuit applications. Stacking of the tungsten-plug contacts and vias is allowed in the multilevel metallization module. A process window analysis has also been performed to derive the optimal device design targets. Compared with the CMOS counterpart, approximately 40% speed improvement (at 3.3 V V/sub cc/) in a 68030 critical path has been demonstrated using this logic BiCMOS technology.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>