Wafer-level Charged Device Model testing

Abstract

Charged Device Model (CDM) ESD testing is demonstrated on wafer level. With a custom probe-mounted printed-circuit board and a high-frequency transformer that captures fast CDM pulses, wafer-level CDM (WCDM) pulses are applied and monitored repeatably. Modeling of CDM and WCDM in the time and frequency domain illustrates the dominant effects, and shows that WCDM can reproduce all the major phenomena of package-level CDM testing.