Channel engineering for the reduction of random-dopant-placement-induced threshold voltage fluctuation

Abstract

A simple model is proposed, which is able to calculate V/sub TH/ standard deviation due to random dopant placement in the channel, for arbitrary vertical impurity distributions. Substantial decrease in V/sub TH/ fluctuation, while keeping V/sub TH/ the same, is confirmed for low surface impurity channel MOSFETs, in agreement with the model prediction.