A novel edge termination for high voltage SiC devices

Abstract

This paper reports a new edge termination for SiC power semiconductors. The novel concept, termed JTE (Junction Termination Extension) rings, combines the advantages of two classical termination techniques, namely floating p+ rings and JTE, to create a more efficient and robust edge termination. The new concept has been applied to large area (5×5mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) Junction Barrier Schottky (JBS) diodes rated for 1.7kV applications. Both numerical and experimental results of the new concept are presented. Dynamic measurements, where the main switch was a Si IGBT, show that the JTE rings concept offers similar performance to JTE edge design, however, with a 30% area reduction.