Publication | Closed Access
Antiwear Leveling Design for SSDs With Hybrid ECC Capability
11
Citations
23
References
2016
Year
Hardware SecurityElectrical EngineeringReliability EngineeringEngineeringStorage PerformanceHybrid Ecc CapabilityHardware ReliabilityFlash MemoryElectronic DesignComputer ArchitectureComputer EngineeringSolid-state DrivesElectronic PackagingMicroelectronicsIn-storage ComputingWear Leveling
With the joint considerations of reliability and performance, hybrid error correction code (ECC) becomes an option in the designs of solid-state drives (SSDs). Unfortunately, wear leveling (WL) might result in the early performance degradation to SSDs, which is common with a limited number of P/E cycles, due to the efforts to delay the bit-error-rate growth. In this paper, an anti-WL design is proposed to avoid such a performance problem so that the performance of SSDs with hybrid ECC capability can be improved without sacrificing their reliability. The capability of the proposed design was evaluated by a series of experiments, for which it was shown that the proposed design could greatly improve the read and write performance of SSDs up to 50% without affecting the endurance of the investigated SSDs, compared with traditional approaches.
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