A novel design of a high speed hysteresis-based comparator in 90-nm CMOS technology

Abstract

Analog-to-digital circuit converts an analog signal having continuous-time and continuous-amplitude to a discrete-time and discrete-amplitude digital signal. A comparator is a vital block in any analog-to-digital circuit. The comparators play a crucial part in the analog to digital conversion. This paper puts forth the design of hysteresis comparator in 90-nm CMOS technology. The proposed comparator reduces the occurrence of noisy output and has high speed, in comparison to the conventional comparator. The circuit design and analysis has been done using Cadence.