2016 · 14 citations · 26 references
Hardware SecurityMassively-parallel ComputingEngineeringProblem DomainEdge ComputingHigh-performance ArchitectureComputer ArchitectureComputer EngineeringImproves Temporal LocalityParallel ProgrammingComputer ScienceLoop TilingParallel ComputingData-level ParallelismMemory ArchitectureExternal-memory Algorithm
Loop tiling or blocking improves temporal locality by dividing the problem domain into tiles and then repeatedly accessing the data within a tile. While this reduces reuse, it also leads to an often ignored side-effect: breaking the streaming data access pattern. As a result, tiled codes are unable to exploit the sophisticated hardware prefetchers in present-day processors to extract extra performance.
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A set of level 3 basic linear algebra subprograms
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