IEEE Transactions on Circuits & Systems II Express Briefs · 2016 · 146 citations · 11 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignSystem-on-chip DesignCmos Circuit DesignDigital Integrated Circuit DesignDigital Integrated CircuitsLow-power Digital Circuit DesignVoltage ScalingCmos Digital Circuit DesignCurrent EfficiencyFine-tuningLow-dropout RegulatorsLow-voltage Cmos DesignProcess ScalabilitySteady-state OperationUndershoot
The digital low dropout regulator (D-LDO) has drawn significant attention recently for its low-voltage operation and process scalability. However, the tradeoff between current efficiency and transient response speed has limited its applications. In this brief, a coarse-fine-tuning technique with burst-mode operation is proposed to the D-LDO. Once the voltage undershoot/ overshoot is detected, the coarse tuning quickly finds out the coarse control word in which the load current should be located, with large power MOS strength and high sampling frequency for a fixed time. Then, the fine-tuning, with reduced power MOS strength and sampling frequency, regulates the D-LDO to the desired output voltage and takes over the steady-state operation for high accuracy and current efficiency. The proposed D-LDO is verified in a 65-nm CMOS process with a 0.01-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> active area. The measured voltage undershoot and overshoot are 55 and 47 mV, respectively, with load steps of 2 to 100 mA with a 20-ns edge time. The quiescent current is 82 μA, with a 0.43-ps figure of merit achieved. Moreover, the reference tracking speed is 1.5 V/μs.
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Yu-Huei Lee, Shen-Yu Peng, Chaochang Chiu et al. · IEEE Journal of Solid-State Circuits · 2013 · 97 citations
Engineering, Computer Engineering, Electrical Engineering +17