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A Majority-Logic Nanodevice Using a Balanced Pair of Single-Electron Boxes
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2002
Year
EngineeringNanodevicesElectronic DesignIntegrated CircuitsNanocomputingNanoelectronicsMajority-logic Gate DeviceNanonetworkElectronic CircuitElectrical EngineeringNanoscale SystemPhysicsNanotechnologyMinute DotComputer EngineeringMicroelectronicsCircuit DesignApplied PhysicsMajority-logic NanodeviceGate DeviceBeyond Cmos
This paper describes a majority-logic gate device that will be useful in developing single-electron integrated circuits. The gate device consists of two identical single-electron boxes combined to form a balanced pair. It accepts three inputs and produces a majority-logic output by using imbalances caused by the input signals; it produces a 1 output if two or three inputs are 1, and a 0 output if two or three inputs are 0. We combine these gate devices into two subsystems, a shift register and an adder, and demonstrate their operation by computer simulation. We also propose a method of fabricating the unit element of the gate device, a minute dot with four coupling arms. We demonstrate by experiments that it is possible to arrange these unit elements on a GaAs substrate, in a self-organizing manner, by means of a process technology that is based on selective-area metalorganic vapor-phase epitaxy.