CMOS SPADs: Design Issues and Research Challenges for Detectors, Circuits, and Arrays

Abstract

Solid-state single photon detectors are playing a significant role in the development of high-performance single-photon imaging systems for fluorescence lifetime imaging, time-of-flight positron emission tomography and Raman Spectroscopy applications. The main driving factors are the unparalleled levels of miniaturization and portability, low fabrication costs, and high overall performance resulting from the integration of single-photon avalanche diodes (SPADs) with mixed-signal circuits in deep-submicron (DSM) complementary metal-oxide-semiconductor (CMOS) technology. At the heart of such imaging systems is the SPAD, capable of single-photon sensitivity and sub-nanosecond time resolution, and its associated circuitry, which in DSM CMOS, is capable of high-speed, low-power mixed-mode signal processing. In this paper, we review and discuss the most recent developments in DSM CMOS SPAD detectors, circuits and arrays and investigate issues of scalability, miniaturization and performance trade-offs involved in designing SPAD imaging systems. Design considerations, research challenges, and future directions for CMOS SPAD image sensors will be highlighted and addressed.