IEEE Transactions on Visualization and Computer Graphics · 2016 · 104 citations · 25 references
ComputingComputer EngineeringComputer SystemsComputer GraphicsReconfigurable ComputingRenderingAugmented RealityAugmented Reality HardwareDisplay TechnologiesHead-mounted Display SystemsImage SynthesisReal-time Rendering For Virtual RealityBinary EncodingDisplay LatencyDisplay OpticsEmbedded Processing UnitsEnd-to-end LatencyMotion-to-photon LatencyOptical See-through DisplaysSynthetic Imagery
We describe an augmented reality, optical see-through display based on a DMD chip with an extremely fast (16 kHz) binary update rate. We combine the techniques of post-rendering 2-D offsets and just-in-time tracking updates with a novel modulation technique for turning binary pixels into perceived gray scale. These processing elements, implemented in an FPGA, are physically mounted along with the optical display elements in a head tracked rig through which users view synthetic imagery superimposed on their real environment. The combination of mechanical tracking at near-zero latency with reconfigurable display processing has given us a measured average of 80 µs of end-to-end latency (from head motion to change in photons from the display) and also a versatile test platform for extremely-low-latency display systems. We have used it to examine the trade-offs between image quality and cost (i.e. power and logical complexity) and have found that quality can be maintained with a fairly simple display modulation scheme.
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Ronald Azuma · PRESENCE Virtual and Augmented Reality · 1997 · 9.7K citations
Architecture, Design, 3D Modeling +11
Algorithm for computer control of a digital plotter
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Jonathan Shade, Steven J. Gortler, Li-wei He et al. · 1998 · 1.1K citations · Full text