Near‐zero dead zone phase frequency detector with wide input frequency difference

Abstract

An all‐digital phase frequency detector design capable of accepting an infinite range of input frequency differences and [0 2 π ] radians input phase difference is presented. The proposed phase frequency detector design minimises the dead zone, supresses unwanted output glitches, achieves a high maximum operating frequency, can drive high‐capacitive loads and avoids differential outputs. The proposed phase frequency detector takes advantage of a fast reset operation from modified tristate inverters acting as a D flip‐flop. Simulation results indicate that the design can detect input phase differences as small as 750 fs apart for all process corners at input operating frequencies of 38 kHz–2.5 GHz in 1.2 V, 90 nm CMOS technology.