Enhanced ESD power clamp for antenna switch controller with SOI CMOS technology

Abstract

An enhanced electrostatic discharge (ESD) power clamp for an antenna switch controller with silicon‐on‐insulator (SOI) complementary metal‐oxide‐semiconductor (CMOS) technology is presented. The gate drive voltages of larger n‐type metal‐oxide‐semiconductor transistors in a stacked configuration of a RC‐triggered power clamp have been optimised to obtain larger discharging capability and shorter turn‐on time compared to the conventional topology. The proposed ESD power clamp circuits are implemented in a double‐pole five‐throw antenna switch controller and the experimental results confirm the validity of this approach.