Publication | Closed Access
WCET analysis for multi-core processors with shared buses and event-driven bus arbitration
14
Citations
12
References
2015
Year
Unknown Venue
Wcet AnalysisEngineeringComputer ArchitectureSoftware EngineeringMultithreading (Computer Architecture)Processor ArchitecturePerformance IssueHardware SecuritySystems EngineeringParallel ComputingMulti-core ProcessorsManycore ProcessorInstruction-level ParallelismComputer EngineeringComputer SciencePerformance Analysis ToolEvent-driven Bus ArbitrationProgram AnalysisParallel Performance EvaluationMany-core ArchitectureFormal MethodsMultiprocessor SystemProcessor CoreParallel ProgrammingExecution Time
Multi-core processors share common hardware resources between several processor cores. As a consequence, a program executed on one processor core may influence the execution time of the programs executed on the concurrent cores. This effect is commonly referred to as shared-resource interference. Worst-case execution time (WCET) analysis for multi-core processors has to take into account the shared-resource interference.
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