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A Digital Hysteresis Current Controller for Three-Level Neural-Point-Clamped Inverter With Mixed-Levels and Prediction-Based Sampling
34
Citations
26
References
2015
Year
Electrical EngineeringEngineeringZero-approaching Hysteresis BandAnalog DesignMechatronicsElectrical DriveComputer EngineeringPower Electronics ConverterDigital Hysteresis ControllerThree-level Neural-point-clamped InverterPower InverterPrediction-based SamplingPower ElectronicsHysteresis BandHysteresisAnalog-to-digital ConverterStability
For a grid-tied three-level neural-point-clamped (NPC) inverter, fully digital hysteresis controller with simple variable hysteresis band is insufficient to stabilize switching frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> ). The challenge mainly comes from the restriction of analogue-to-digital converter (ADC) sampling frequency, which leads to inaccurate current-boundary-touching capture. As a result, f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> jitter appears. This phenomena becomes much more serious around grid voltage zero-crossing points due to zero-approaching hysteresis band, where obvious f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> variation happens. To stabilize f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> in a fully digital manner, two techniques are proposed in this paper: the mixed-level scheme and the prediction-based sampling method. The former one is used to cope with the obvious f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> variation around grid voltage zero-crossing points. It switches operating status from three-level state into two-level state around grid voltage zero-crossing points to enlarge the hysteresis band for digital implementation. The latter one is used to resolve f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> jitter. It makes the sampling and switching to happen at the moment of current boundary-touching to achieve the most effective boundary-comparing with the lowest ADC sampling frequency. With these two techniques, f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> of the grid-tied three-level NPC inverter could be well stabilized with a fully digital hysteresis controller, and therefore, high-quality grid-side could be achieved.
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