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3-D-Stacked 16-Mpixel Global Shutter CMOS Image Sensor Using Reliable In-Pixel Four Million Microbump Interconnections With 7.6-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> Pitch
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Citations
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References
2015
Year
EngineeringDevice IntegrationComputer ArchitectureIntegrated CircuitsImage SensorCmos Image SensorComputational ImagingPhotonic Integrated CircuitInstrumentationTex-math Notation=Electrical EngineeringGlobal ShutterTime-of-flight CameraComputer EngineeringMicroelectronicsOptical SensorsThree-dimensional Heterogeneous IntegrationImage ProcessorImage Resolution
We have developed a 3-D-stacked 16-Mpixel, 3.8- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> pitch, and global shutter (GS) CMOS image sensor with a 2-Mpixel 10 000-frames/s high-speed image-capturing mode, with four million reliable microbump interconnections. This sensor consists of a photodiode (PD) substrate and an in-pixel storage node substrate. The four PDs in the unit pixel circuit on the top substrate share one microbump interconnection in 7.6- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> pitch. Each signal of the PDs is transferred to the corresponding storage node on the bottom substrate via the interconnection to achieve a GS function. The ratio of the parasitic light sensitivity of an in-pixel storage node and the light sensitivity of a PD is −180 dB, which is the best record for a CMOS image sensor with 3.8- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> pixels. The image sensor was fabricated with a wafer-on-wafer bonding process technology. We confirmed that the bonding process did not harm the pixel or the MOS transistor characteristics and required no extra area, which means no restrictions on the layout design of microbumps or circuits. No reliability problems were observed in either a heat cycle test or a high temperature and high humidity test.
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