2015 · 19 citations · 3 references
Low-power ElectronicsTx ChainElectrical EngineeringIntegrated Log DetectorVlsi DesignEngineeringRadio FrequencyMixed-signal Integrated CircuitGhz Front-end IcComputer EngineeringSige BicmosIntegrated CircuitsMicroelectronicsRf Subsystem
A highly integrated 4.9-5.9 GHz single chip front-end IC (FEIC) is presented, which is based on SiGe BiCMOS, realized in a 1.6 mm2 chip area and in an ultra-compact 1.7 × 2.0 × 0.33 mm3 package. The Tx chain has >30 dB gain and meets -40 dB DEVM up to Pout of 15 dBm and -35 dB DEVM up to Pout of 17 dBm with a 3.3 V supply, insensitive to modulation bandwidths and duty cycle. The ultra-low back-off DEVM enables the emerging 1024-QAM applications. The integrated log detector enhances the dynamic range for the transmit power control. The Rx chain features <;2.8 dB NF and 15 dB gain with 3 dBm IIP3 and 10 dB bypass attenuator with 23 dBm IIP3. All the unique features enhance the front-end circuit designs of complex radios based on the 802.11ac standard.
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