IEEE Journal of Solid-State Circuits · 2003 · 20 citations · 10 references
EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignClock ManagementCmos Circuit DesignDigital Integrated CircuitsIntegrated Circuit DesignIntegrated Circuit DevicesMixed-signal Integrated Circuit DesignClock Data RecoveryHeterojunction Bipolar TransistorsJitter Tolerance
A 43.2-Gb/s clock and data recovery/demultiplexer (CDR/DMUX) integrated circuit (IC) implemented in InP heterojunction bipolar transistor (HBT) technology is demonstrated. The IC is fully integrated, requiring only a single external capacitor for complete functionality. The IC exceeds extrapolated SONET/SDH jitter tolerance specifications, operates with an industry-standard +3.3-V power supply, and dissipates 3.3 W.
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Clock recovery from random binary signals
John Alexander · Electronics Letters · 1975 · 309 citations
Engineering, Computer Engineering, Electrical Engineering +16
A two-chip 1.5-GBd serial link interface
Richard Walker, C. Stout, Jieh-Tsorng Wu et al. · IEEE Journal of Solid-State Circuits · 1992 · 43 citations
Engineering, Computer Engineering, Electrical Engineering +15