2015 · 18 citations · 8 references
EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsMicrowave EngineeringHigh-frequency Semiconductor DevicesMicrowave AmplifiersMicrowave Integrated CircuitsMicrowave Semiconductor DevicesPower AmplifiersRadio-frequency Integrated CircuitsBicmos TechnologyHigh-frequency Amplifier DesignPower Amplifier DesignPower Amplifier StagesPower OutputRadio Frequency Power AmplifiersSige Bicmos DesignSmall-signal Gain
A D-Band ×2 frequency multiplier-amplifier chain implemented in a f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> /f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MAX</sub> = 250/330 GHz 0.12 μm SiGe BiCMOS technology is presented. The chain achieves a peak output power of 17.8 dBm at 115 GHz and consists of input balun and push-push frequency doubler which drives a balanced three stages Power Amplifier (PA). It operates from 110 GHz to 130 GHz (3 dB power bandwidth) with -2 dBm input power at V-Band and consumes a total DC power of 600 mW. The PA achieves output 1 dB compression point and saturated power of 13.5 and 17.6 dBm, respectively, at 120 GHz and peak small signal gain of 32 dB.
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Lei Wang, Yong‐Zhong Xiong, Bo Zhang et al. · IEEE Transactions on Microwave Theory and Techniques · 2011 · 36 citations