A HARDWARE IMPLEMENTATION OF THE APE100 ARCHITECTURE

A. Bartoloni, G. Bastianello, C. Battista, S. Cabasino, F. Marzano, Pier Stanislao Paolucci, J. Pech, F. Rapuano, Emanuele Panizzi, R. Sarno,

International Journal of Modern Physics C · 1993 · 45 citations · 0 references

Concepts

Abstract

APE100 processors are based on a simple Single Instruction Multiple Data architecture optimized for the simulation of Lattice Field Theories or other complex physical systems. This paper describes the hardware implementation of the first APE100 machine.