2000 · 74 citations · 14 references
EngineeringComputer EngineeringComputer ScienceCompilersComputer ArchitectureField-programmable Gate ArraysCompiler ConstructionFpga ArchitectureHardware AccelerationInstruction Set ArchitectureProcessor MicroarchitectureReconfigurable System ArchitectureCompilation For Reconfigurable HardwareCompiler DesignCompiler SupportProcessor ArchitectureReconfigurable ArchitecturesReconfigurable Computing ArchitecturesReconfigurable MicroarchitectureReconfigurable Processor Architectures
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that can extract computations from applications to put into the RFU. The results show that large instruction sequences can be created and extracted by these techniques. An average speedup of 2.6 is achieved over a set of benchmarks.
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Garp: a MIPS processor with a reconfigurable coprocessor
John R. Hauser, John Wawrzynek · 2002 · 794 citations
A dynamic instruction set computer
Michael Wirthlin, Brad Hutchings · 2002 · 306 citations
The Chimaera reconfigurable functional unit
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Engineering, Computer Science, High-performance Computing +17
Zhi Alex Ye, Andreas Moshovos, Scott Hauck et al. · 2000 · 249 citations