IEEE Journal on Emerging and Selected Topics in Circuits and Systems · 2011 · 20 citations · 12 references
EngineeringComputer EngineeringElectrical EngineeringDesign OptimizationLow-power DesignMicroelectronicsCmos Circuit DesignEnergy-efficient DesignIntegrated Circuit DesignMos CapacitorsPower OptimizationPower-aware DesignAc-dc RectifiersDesign MethodologyLow-power Cmos DesignMulti-threshold Cmos DesignMultiplier DesignOptimal SizingUltra-low-power CmosVoltage Multipliers
This paper presents a specific, fully-automated and portable design methodology used to optimize implementations of AC-DC rectifiers using MOS diodes. Output voltage and efficiency are theoretically analyzed taking into account influences of devices DC and AC characteristics, input signal voltages and frequencies as well as load currents, temperatures, backgate voltages and even capacitors and diodes parasitic capacitances. An experimental voltage multiplier is designed in a 1 μm multiple-threshold voltage SOI CMOS technology for ultra low power applications at 13.56 MHz .
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