Bridging defects resistance measurements in a CMOS process

Abstract

Measurements on process-related defect nionitwing ,wcijers are presented in order to euuluute the i,csisluiict. ,ualu,e of b ridyzng deJects zn CMOS VLSI circu~ts. 'I'he inethodoloyy u sed is dlustrated and statzstics OIL the 1.esistance values are p resented. As a result, the vast niajoi-zty of the measured brzdges have a 1o.w 7.eszsta.nce. Only a small percentage of the brzdges has U i.eszstunce va1u.e above 500 R, while the exact percentage cui1 vuq strongly from batch to batch. Tlirs high resisturict. does not seem to be the result of the materzal of the defect itself, but rather the result o f the form and locatzon of the defect. These circumstances can result rn one or two poor contacts between. the defect and the destgn,ed stlucture of the IC, and thus in a hrgh reszsizue defect.