Proceedings - IEEE Aerospace Conference · 2003 · 15 citations · 32 references
EngineeringComputer EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesDevice CharacterizationDevice ReliabilityDevice ScalingIntegrated Circuit DesignMemory DevicesSemiconductor ReliabilityDevice Scaling EffectsDynamic CharacterizationEnduranceEndurance CharacteristicsLong-term Data RetentionNonvolatile MemoryNonvolatile Memory DevicesScaling Effects
We describe progress in the design and scaling of SONOS nonvolatile memory devices. The deterioration of the Si-SiO/sub 2/ interface is associated with the degradation of long term retention in SONOS nonvolatile semiconductor memory (NVSM) devices. Two-step, high temperature deuterium anneals improves the endurance characteristics and retention reliability over traditional hydrogen anneals. We have realized -9 V +10 V (1ms) programmable SONOS devices ensuring 10 years retention time after 10/sup 7/ erase/write cycles at 85/spl deg/C. We introduce scaling considerations and process optimization along with experiments and SONOS device characterization. An FPGA-based measurement system is described for the dynamic characterization of SONOS nonvolatile memory devices.
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Michael White, Dennis A. Adams, Jianhui Bu · IEEE Circuits and Devices Magazine · 2000 · 399 citations
Engineering, Computer Engineering, Electrical Engineering +17
Cryogenic UHV-STM Study of Hydrogen and Deuterium Desorption from Si(100)
E. T. Foley, A. F. Kam, Joseph W. Lyding et al. · Physical Review Letters · 1998 · 208 citations