A circuit model for ESD performance analysis of printed circuit boards

Byongsu Seol, Jong-Sung Lee, Jae-Deok Lim, Hyungseok Lee, Hark-Byeong Park, Argha Nandy, David Pommerenke

2008 · 13 citations · 8 references

Concepts

Abstract

This paper provides a SPICE-compatible circuit model for characterizing electrostatic discharge (ESD) clamping performance of protection devices mounted on printed circuit boards (PCBs). An equivalent circuit model for a commercial ESD generator is introduced and a simulation methodology of an ESD protection device with non-linear resistance characteristic using voltage controlled current source is described. These models combined to create a full circuit model with a PCB model in a SPICE-like circuit simulator. Comparison results between the simulated and measured are presented to verify the accuracy of the proposed circuit model. A trade-off analysis between the ESD clamping performance and signal integrity with the ESD protection device in high-speed applications is also presented as a case study.

References

8