Digital foreground calibration of capacitor mismatch for SAR ADCs

Abstract

A foreground digital self‐calibration technique that improves capacitor matching of a digital‐to‐analogue converter (DAC) employed in successive approximation register (SAR) analogue‐to‐digital converters (ADCs) is presented. By exploiting an antisymmetric behaviour of capacitor mismatch errors in SAR ADCs and the proposed DAC switching scheme, the calibration technique significantly reduces capacitor mismatch errors without resorting to extensive computation or dedicated circuits.