Publication | Closed Access
Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems
128
Citations
22
References
2005
Year
EngineeringComputer ArchitectureSafety-critical ApplicationsFault ToleranceEmbedded SystemsFault-tolerant MessagingFormal VerificationDesign Optimization ApproachHardware SecurityReliability EngineeringSystems EngineeringFault RecoveryFault-tolerant ControlComputer EngineeringDistributed SystemsComputer ScienceFault-tolerant NetworkFault TolerantReal-time Systems
In this paper we present an approach to the design optimization of fault tolerant embedded systems for safety-critical applications. Processes are statically scheduled and communications are performed using the time-triggered protocol. We use process re-execution and replication for tolerating transient faults. Our design optimization approach decides the mapping of processes to processors and the assignment of fault-tolerant policies to processes such that transient faults are tolerated and the timing constraints of the application are satisfied. We present several heuristics which are able to find fault-tolerant implementations given a limited amount of resources. The developed algorithms are evaluated using extensive experiments, including a real-life example.
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