Minimum inventory variability schedule with applications in semiconductor fabrication

Abstract

A typical semiconductor wafer fab contains many different products and processes, some with small quantities, competing for resources. Each product row can contain hundreds of processing steps demanding production time of the same resource many times during the row. When this re-entry requirement is compounded with multiple product flows, short interval scheduling becomes important. Scheduling to reduce variations and to balance the whole wafer production line becomes a very complex issue. We investigate in this paper a new scheduling policy called minimum inventory variability scheduling (MIVS). This scheduling policy can significantly reduce the mean and variance of cycle-time in semiconductor fabs. The conclusions are based on the real world implementation in two major semiconductor fabs since 1990, and a simulation study of a much simplified hypothetical re-entrant network to capture the nature of semiconductor manufacturing. A discrete event simulation model was used to compare MIVS with five different popular dispatching policies (FIFO, SNQ, LNQ, RAN, and CYC) practised in wafer fabrication environments. The results gained on two factory floors and the simulation model indicate that dispatching policies have a significant impact on performance. The simulation results show that the MIVS dispatching policy demonstrated a percentage improvement over all other tested dispatching policies.