IEEE Microwave and Wireless Components Letters · 2010 · 24 citations · 8 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignLow-noise Circuit DesignNoise In Analog CircuitsOscillatorsRadio-frequency Integrated CircuitsTransistor BiasingCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos OscillatorsCmos Radio-frequency CircuitsHartley OscillatorsPhase NoiseSelf-biasingVoltage-controlled Oscillator Design
In this letter, a new complementary Hartley (C-Hartley) voltage controlled oscillator (VCO) with fully differential outputs is proposed, in which the self-biasing configuration is introduced to solve the biasing difficulty of a Hartley VCO by employing a five-port transformer. The proposed C-Hartley VCO with the center frequency of 5.6 GHz is implemented in a 1P6M 0.18 μm CMOS process. The measurement result shows that the phase noise is -123.6 dBc/Hz at 1 MHz offset frequency, while dissipating 6.5 mA from 1.6 V supply with the FOM of -188.5 dBc.
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