IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2000 · 58 citations · 8 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureFormal MethodsHardware Description LanguagesData TypesHardware Modeling For Digital SystemsHardware SpecificationHigh-level SynthesisType CheckingType SystemsHardware Description Language ImplementationHardware GenerationHardware SynthesisPolymorphic TypesSpecification Languages For HardwareStatic Type CheckingType InferenceVhdl
HML introduces polymorphic types and advanced type checking and inference techniques not present in other HDLs. The paper introduces HML, an HDL built on SML, and outlines its translation to VHDL and type inference process. The authors describe HML’s design as an SML‑based HDL and explain its translation to VHDL and type inference mechanisms. They implemented an HML type checker and translator that automatically generates a synthesizable subset of VHDL while inferring types and interfaces.
We present hardware ML (HML), an innovative hardware description language (HDL) based on the functional programming language SML. Features of HML not found in other HDL's include polymorphic types and advanced type checking and type inference techniques. We have implemented an HML type checker and a translator for automatically generating VHDL from HML descriptions. We generate a synthesizable subset of VHDL and automatically infer types and interfaces. This paper gives an overview of HML and discusses the translation from HML to VHDL and the type inference process.
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