IEEE Transactions on Computers · 1992 · 108 citations · 9 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureParallel AlgorithmsParallel ComputingHardware AccelerationLatency OptimizationParallel ArchitecturesParallel Computer ArchitectureParallel Computing SystemsTiming AnalysisCordic AlgorithmsLow-latency DesignScale Factor Control
Several methods for increasing the speed of the CORDIC algorithm are presented. First, an improved method which guarantees a constant scale factor when employing redundant addition schemes is developed. Then, an architecture with increased parallelism which considerably reduces the CORDIC latency time and the amount of hardware is described.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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