IEEE Journal of Solid-State Circuits · 2010 · 39 citations · 9 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsMicrowave EngineeringAnalog FiltersAnalog Integrated CircuitsCmos Circuit DesignMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsReceiver SystemsAnalog Signal ProcessingCmos Analog Integrated CircuitsCmos Radio-frequency CircuitsFast Fourier TransformRadio-frequency Integrated Circuit DesignReceiver Front-endsSoftware Defined RadioTransceiver Architectures
Many technological bottlenecks prevent from realizing a software radio (SR) mobile terminal. The old way of building radio architectures is now over because a single handled terminal has to address various communication standards. This paper exposes a SR receiver: a sampled analog signal processor (SASP) is designed to perform downconversion and channel presorting. The idea is to process analog voltage samples in order to recover in baseband any RF signal emitted from 0 to 5 GHz. An analog fast Fourier transform achieves both frequency shifting and filtering. An experimental demonstrator of the SASP using 65 nm CMOS technology from STMicroelectronics is here presented and measured. It validates the concept of a new SR receiver with the design of a demonstrator which runs at 1.2 GHz consuming 389 mW.
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