IEEE Transactions on Circuits and Systems I Regular Papers · 2008 · 91 citations · 48 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital ConvertersCmos Logic CircuitsCmos Logic DesignResolutionsVoltage
The paper proposes a digital‑CMOS logic–style time‑mode signal‑processing method for delta‑sigma A/D conversion of voltage signals. The method, called time‑mode signal processing, maps input voltage to time‑difference variables and implements a first‑order delta‑sigma ADC in 0.18‑µm CMOS, with two fabricated ICs—one single‑ended and one differential. Experimental results show the fabricated devices achieve 7–9‑bit resolution over 125–400 kHz bandwidth, occupying <50 µm² and consuming <800 µW, demonstrating a compact, low‑power, high‑speed, robust ADC.
In this paper, a signal processing methodology is proposed that performs delta-sigma (DeltaSigma) analog-to-digital (A/D) conversion on voltage signals while implementing all the circuits in a digital CMOS logic style. This methodology, called time-mode (TM) signal processing, uses time-difference variables as an intermediate signal between the input voltage and the digital output. The resulting low-cost silicon devices offer very compact, low-power, high-speed, and robust A/D converter (ADC) alternatives. A first-order DeltaSigma ADC is implemented using this methodology. Two ICs were fabricated in a 0.18- mum CMOS technology to demonstrate the feasibility of the TM DeltaSigma ADC approach. The first IC implements a single-ended input design while a differential design was fabricated in the second IC. Experimental results reveal that these devices can achieve 7-9-bit resolutions within 125-400-kHz bandwidths, while occupying areas smaller than 50 mum ×50 mum and consuming less than 800 muW.
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