IEEE Computer Society Annual Symposium on VLSI · 2004 · 55 citations · 2 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingField-programmable Gate Array ArchitectureFpga ArchitectureProgrammable Logic DevicesRoutingRouting AlgorithmsArithmetic Logic Unit ArchitectureArithmetic Logic Unit DesignDigital Logic CircuitsField-programmable Gate Arrays (Fpgas)Particle Swarm OptimizationPlacementPlacement AlgorithmsRouting In Field-programmable Gate Arrays
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize the FPGA's fixed resources is an efficient placement and routing mechanism. This paper presents particle swarm optimization (PSO) for FPGA placement and routing. Preliminary results for the implementation of an arithmetic logic unit on a Xilinx FPGA show that PSO is a potential technique for solving the placement and routing problem.
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