Concepedia

An efficient layout style for 2-metal CMOS leaf cells and their automatic generation

Chi-Yi Hwang, Yung-Ching Hsieh, Youn-Long Lin, Yu-Chin Hsu

1991 · 12 citations · 19 references

Open access

Concepts

EngineeringComputer EngineeringComputer ScienceComputer-aided DesignMicroelectronicsSemiconductor DevicesCmos Circuit DesignIntegrated Circuit DesignVery-large-scale Integration LayoutCell Layout DesignComputer-aided Design For Integrated CircuitsLayout Techniques

Abstract

We propose a new layout style that enables an automatic layout synthesizer to take full advantage of the second metal layer available from today's technology.

References

19

An Efficient Heuristic Procedure for Partitioning Graphs

Brian W. Kernighan, Shang Min Lin · Bell System Technical Journal · 1970 · 5.3K citations

Computing, Computer Science, Electrical Engineering +17

Wire routing by optimizing channel assignment within large apertures

Akihiro Hashimoto, James D. Stevens · 1971 · 680 citations

Engineering, Computer Engineering, Electrical Engineering +16

Optimal Layout of CMOS Functional Arrays

Uehara, vanCleemput · IEEE Transactions on Computers · 1981 · 272 citations

Engineering, Computer Engineering, Electrical Engineering +17

Optimal Chaining of CMOS Transistors in a Functional Cell

Shmuel Wimer, Ron Y. Pinter, J.A. Feldman · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1987 · 128 citations

Engineering, Computer Engineering, Electrical Engineering +17

Layout optimization of static CMOS functional cells

Robert L. Maziasz, John P. Hayes · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1990 · 66 citations

Engineering, Computer Engineering, Computer Science +14