An improved fast transient response low dropout voltage regulator

Abstract

A design of fast transient response low drop out voltage regulator (LDO) is presented. The requirement of fast transient response is dependent on the loading condition. In high speed applications, chips runs at MHz frequency, so the load current changes from zero to full value and so forth in a very small time. In such cases circuit with fast transient response is a definite requirement. This LDO is implemented in 0.18 um generic CMOS technology; it generates fixed 1.6 V from a supply of 3.6 V which on discharging goes down to 1.9 V. The buffer stage used is a wide band OTA capable of providing rail-to-rail swing and full current for charging and discharging the large driver transistor capacitance, that enables fast slewing. Simulation result shows that the proposed circuit provides full load transient response of less than 44 ns settling time and less than 15 mV undershoot.